**problem understanding**

An important issue to consider when using digital filters is the effect the signal level has on its digital-to-analog domain conversion. Suppose the system provides a digital signal to the processing unit and converts it to analog using an ideal DAC without any processing, as shown in Figure 1. In this example, we feed a 0-dBFS digital signal to the DAC and convert it to the analog domain. The full-scale amplitude signal codec specification describes the relationship between digital encoding and analog output amplitude. If the full-scale amplitude specification is 0.707 VRMS (or 1peak), this means that a full-scale 0-dBFS digital sine wave will produce a 1-Vpeak sine wave as shown.

If the limits of the DAC are –2n–1 and 2n–1–1, since they are clipped at the output, amplifying the signal beyond these limits will distort the signal (assuming saturated logic), as shown in Figure 2 shown. Note that most signal processors generally allow a certain amount of headroom before providing data to the DAC. It is important that the data in the processor memory remains undistorted. Figure 2 depicts some DAC input limits where output clipping may occur when the limits are exceeded.

Figure 1: Full-scale digital signal represented as a 1-Vpeak analog signal

Figure 2: Excessive gain in the digital domain can push the signal beyond the upper and lower limits of the DAC

One solution to this problem is to ensure that the limits of the DAC are not exceeded when amplifying the signal (ie, to ensure that no positive gain is applied to the source signal). However, in many cases, the effect of this solution is not so obvious. There are also some detrimental effects of performing a signal boost relative to the full-scale DAC input amplitude over a specific frequency range. In Figure 3, the 500-Hz signal is boosted by 6 dB. We observed distortion in the analog output due to DAC clipping.

Figure 3: Possible boost effect for a given frequency band

Figure 4 also depicts this concept. Note that the noise of the source data is inherited when a larger bus width is passed to the processor memory. As before, the data was down-scaled by the maximum total signal enhancement to fit the enhanced region. However, as shown in Figure 5, even if the boost reference point is at some good location, the DAC signal will be affected by the output SNR. If the amount of signal enhancement does not greatly impair the overall system SNR, simple tuning may be a viable solution. Some low-power codecs have 100dB SNR, which allows a certain amount of adjustment without sacrificing the original 16-bit source SNR.

Figure 4: Signal composition of an all-digital signal chain

Figure 5: Signal composition when conditioning is used

**problem understanding**

An important issue to consider when using digital filters is the effect the signal level has on its digital-to-analog domain conversion. Suppose the system provides a digital signal to the processing unit and converts it to analog using an ideal DAC without any processing, as shown in Figure 1. In this example, we feed a 0-dBFS digital signal to the DAC and convert it to the analog domain. The full-scale amplitude signal codec specification describes the relationship between digital encoding and analog output amplitude. If the full-scale amplitude specification is 0.707 VRMS (or 1peak), this means that a full-scale 0-dBFS digital sine wave will produce a 1-Vpeak sine wave as shown.

If the limits of the DAC are –2n–1 and 2n–1–1, since they are clipped at the output, amplifying the signal beyond these limits will distort the signal (assuming saturated logic), as shown in Figure 2 shown. Note that most signal processors generally allow a certain amount of headroom before providing data to the DAC. It is important that the data in the processor memory remains undistorted. Figure 2 depicts some DAC input limits where output clipping may occur when the limits are exceeded.

Figure 1: Full-scale digital signal represented as a 1-Vpeak analog signal

Figure 2: Excessive gain in the digital domain can push the signal beyond the upper and lower limits of the DAC

One solution to this problem is to ensure that the limits of the DAC are not exceeded when amplifying the signal (ie, to ensure that no positive gain is applied to the source signal). However, in many cases, the effect of this solution is not so obvious. There are also some detrimental effects of performing a signal boost relative to the full-scale DAC input amplitude over a specific frequency range. In Figure 3, the 500-Hz signal is boosted by 6 dB. We observed distortion in the analog output due to DAC clipping.

Figure 3: Possible boost effect for a given frequency band

Figure 4 also depicts this concept. Note that the noise of the source data is inherited when a larger bus width is passed to the processor memory. As before, the data was down-scaled by the maximum total signal enhancement to fit the enhanced region. However, as shown in Figure 5, even if the boost reference point is at some good location, the DAC signal will be affected by the output SNR. If the amount of signal enhancement does not greatly impair the overall system SNR, simple tuning may be a viable solution. Some low-power codecs have 100dB SNR, which allows a certain amount of adjustment without sacrificing the original 16-bit source SNR.

Figure 4: Signal composition of an all-digital signal chain

Figure 5: Signal composition when conditioning is used

**Quantization and Numerical Representation**

In number processing, a real number is represented as an integer value with fixed precision. This is called quantization, and the quantized value is an approximation of the original value. Integer values can be represented as a fixed-point or floating-point number. An integer value represented as a fixed-point number consists of numeric and decimal places. An integer value represented as a floating-point number consists of exponent bits and mantissa bits. This discussion is all about fixed-point numbers and fixed-point arithmetic.

In number processing, a real number is represented as an integer value with fixed precision. This is called quantization, and the quantized value is an approximation of the original value. Integer values can be represented as a fixed-point or floating-point number. An integer value represented as a fixed-point number consists of numeric and decimal places. An integer value represented as a floating-point number consists of exponent bits and mantissa bits. This discussion is all about fixed-point numbers and fixed-point arithmetic. Fixed-point numbers are represented as two’s complement integers with a fixed number of digits after the decimal point (the decimal point). These numbers make up the fractional part of the value. The number before the decimal point is the integer part and indicates the range of values. The integer part also contains the sign of the value.

Digital data entering the audio processor is considered to be a real number between -1 and 1-1LSB. Assuming the real value is represented as a 16-bit fixed-point number, the value -1 can be represented as 1000000000000000 in binary (or 0x8000 in hexadecimal). In two’s complement arithmetic, 0x8000 corresponds to an integer value equal to –32768. This means that dividing this integer value by 32768 gives a quantized approximation of the real value. The largest 16-bit positive number in binary is 0111111111111111 (or 0x7FFF in hexadecimal). The corresponding integer value is 32767. Divide it by the 32768 conversion factor to get the largest real number represented by this mode. The value is 32767/32768 = 0.999969482421875. Figure 6 shows this fixed-point representation.

Figure 6: Fixed-point representation of real numbers

In this representation, there are 15 decimal places and 1 integer bit, which are also the sign bit. This means that real numbers must lie between -1 and 0.999969482421875 before quantization. If a real number exceeds or falls below this range, it cannot be represented in the given format because the 16-bit register will overflow. To accommodate larger real numbers, we need to increase the integer part at the cost of reducing the fractional part. This format is also known as the 1.15 format (1=digit, and 15=sign). Input to a number processor is always represented in the 1.n format, where n is the number of decimal places (15, 19, 23, or 31). The 0dBFS value corresponds to the RMS value of a full-scale sine wave whose amplitude is (2n–1)/2n. The largest real number in a given format is represented by 2n. The number of bits used to represent a signal is called signal width or data width.

**overflow and saturation**

An overflow occurred when a processing unit calculation yielded a value larger than the data bit width value. Overflow is generally related to the calculation of an accumulator, where consecutive values of the same sign are added and then stored. Even after overflow, the accumulator will generally continue to accumulate, because as long as the bounds are not exceeded, the correct final result will still be obtained.

The accumulator output saturates before it is stored as a signal value. Saturation is a process in which positive overflows are converted to the largest positive number and negative overflows are converted to the smallest negative number. Saturation is a nonlinear operation and causes severe output harmonic distortion. We use margin bits to prevent saturation.

**signal bit**

Signal and noise bits affect system performance. Digital audio processors add quantization noise, and overall performance is the result of analog circuit noise and quantization noise. Assuming that both noise sources are the result of independent random processes, the total system noise performance can be defined as:

where S is a uniformly distributed random signal, NC is the DAC circuit noise, and NQ is the quantization noise. Using the 100-dB DAC and 120-dB signal processor, this results in an overall SNR of 99.96 dB.

We should note that the total SNR is also limited by the source-digital audio processor input. If the input is 16 bits, the signal quantization-to-noise ratio (SQNR) of the system is at most 96 dB (assuming a uniformly distributed random signal, unweighted). Therefore, in this case, even a higher internal representation (lower NQ) will not provide a significant improvement.

**noise bit**

As mentioned earlier, the number of bits in a signal determines the performance of a digital audio system. Sometimes, filter response calculations require more bits.

The filter implementation includes a data path through which a signal flows and is stored as filter delay elements. The signal and delay values are multiplied by the filter tap correlation coefficient. Coefficient quantization also plays a very important role in system performance. The product of the signal and the coefficient value is stored in an accumulator, which typically has a higher bit width than the signal. Subsequent products are added in the accumulator (higher bit width), and the final filter output is stored again with signal precision (lower bit width).

Consider the biquad filter implementation shown in Figure 7. In the figure, the input and output signals are represented by “A bit”. The A and b coefficients are represented in “B bits”. The input signal and its delay elements are multiplied by coefficients and added in the accumulator. The multiplier and accumulator together are A+B bits wide. After that, the output signal is quantized by the Q block and then stored as an A-bit number. This creates quantization error, which is a source of noise for the digital filter; therefore, additional bits are required to ensure that the noise contribution of the digital filter is lower than the target SNR. These extra bits are called noise bits. Compared with finite impulse response (FIR) filters, the effect of noise on IIR filters is more pronounced. The number of noise bits also depends on the sampling frequency and cutoff frequency of the digital filter. As the sampling frequency increases, the required number of noise bits also increases. As the cutoff frequency decreases, the required number of noise bits increases. At 48-kHz operation, 14 to 16 noise bits are sufficient to maintain the target SNR of the 40-Hz filter.

Figure 7: Biquad filter implementation

**Margin bit**

In addition to the signal and noise bits, more bits are needed to prevent overflow. These bits are called margin bits. The end-to-end audio processing chain typically maintains signal levels. This means that if a 0-dB signal is the input to the signal chain, the output will be 0dB or less. (There is usually a signal compressor that limits the signal swing to a few decibels below zero.) If we use a boost filter to amplify certain signal bands, other bands are generally attenuated to prevent the signal from rising to the 0dB or more. In the latter case, when the input signal level is 0dB (also called neutral signal level), the output signal will be below 0dB, and only the amplified frequency band will reach 0dB at the output. This reduces the average volume level of the audio signal.

Although the signal level is maintained at 0dB, the signal overflows at intermediate processing points. To prevent overflow, we need margin bits—that is, bits other than signal and noise bits.

There are two overflow sources:

1. The audio processing chain can have a filter with a gain greater than 0dB (at some specific frequency values). The filter can be part of a cascaded filter chain (eg: low-pass, high-pass and/or band-pass filters, etc.) with a total gain of 0dB, or it can be an amplifying neutral signal level dependent specific Frequency selective filters for frequency bands (eg: off-the-shelf EQ filters). Note that if a real number is represented in 1.n format (where n is the number of decimal places), the magnitude of the number is always less than 1. Therefore, if a filter with a gain above 0dB (a real number greater than 1) is used, the output value of the filter will overflow when the input value is 0dB (a real number equal to 1). To prevent overflow in such cases, we need more margin bits.

2. A filter with a gain less than or equal to 0dB will have a transient real value greater than 1. To ensure that these transient values do not overflow, margin bits are used.

Figure 8 shows an illustration of the signals in the audio processor. An important point to note is that the headroom bits are primarily used to accommodate intermediate signal growth. It is expected that at the end of the final processing block, the output will be well within the signal bit width. Also, at low signal amplitudes, the output will remain within limits without distortion; however, at high signal amplitudes, the output will saturate and cause distortion. To prevent distortion, it is best to attenuate the signal before final output.

Figure 8: Margin bit signal representation

**adjust**

Adjusted to avoid saturation of filters with gains above 0dB. We can use a boost filter exclusively to get a certain frequency. Even a multi-section low pass filter will have a biquad section which actually gets some frequencies above the effective headroom (total response is still 0dB). In this case, whether to use or not to use the adjustment method depends on the input signal level multiplied by the maximum gain of the total filter response. If the product is larger than the effective DAC headroom, a scaling method can be used to avoid saturation.

One way to adjust is to attenuate the system’s transfer function by an amount equal to the maximum amplitude of the filter’s transfer function. The adjustment factor can be defined as:

where 0≤ω≤π. The second method is to S-regulate the input signal. Figure 9 shows the effect of adjusting the transfer function. A full-scale sine wave is the input to the transfer function, which attenuates flat frequencies by 6dB. The 1-kHz signal is boosted by 6 dB relative to –6dBFS.

Figure 9: Transfer Function Tuning

In some cases, due to the filter structure and transient signal sequence, the output of the filter will be higher than 0dB, although it does not have a gain above 0dB. If a single memory cell is 0dB and the sign is opposite to the tap, the FIR filter can increase the signal gain by the sum of the absolute values of the filter taps. The filter response cannot exceed 0dB, so extra headroom is used. The calculation of the additional headroom for IIR filters is complex because they have many feedback elements, and finding the closed-form expression that determines the upper bound on the transient gain is a complex process. In fact, one of the reasons signal processors provide extra headroom (above the DAC limit) is to allow for transient headroom. We may need to make some measurements to calculate the extra margin. In some cases, SNR may need to be compromised to deal with distortion from saturation, and analog gain may need to be increased to bring the signal back to 0dB.

With the regulation method, it is sometimes necessary to add extra gain (boost) in the analog output stage to compensate. Special care should be taken to ensure that the signal in the boost region does not saturate the output amplifier, as it can cause a distorted signal. There is also a boost in the final output stage of the processor to compensate for the signal conditioning. This is required by some multi-section, 0dB filters whose signal conditioning is intended to prevent overflow on one or more single sections. For those filters that get frequencies above 0dB (off-the-shelf EQ filters), the neutral signal level is adjusted to below 0dB. In this case, no final boost is required. The result is a loss of SNR in flat regions.

A more elegant solution is to limit the filter gain according to the volume gain applied by the digital processor, which is ideal for headphone applications. At high volume, the frequency boost is reduced and eventually flat at full volume.

In some cases, the frequency boost is kept constant, while the signal is compressed at high volumes. This is the Anti-Clipping Dynamic Range Compressor (DRC) function: at low volumes, the original SNR is maintained, but as volume increases, the degree of modulation increases proportionally to prevent distortion.

Regardless of the method used, it is important to fully consider how people perceive sound and noise. Human hearing has a distinct dynamic range. Headphone amplifiers balance between noise floor and output power to best suit this range. For example, the TLV320AIC3254 audio codec is capable of delivering a very high pure 500 mVRMS sound pressure level (SPL) into a typical 32-Ω or 16-Ω headphone load, with a noise floor (weighted) of 100 dB below full scale, which is at Below the human hearing threshold (see Figure 10). Sometimes, it is not even necessary to add additional amplification after the adjustment has been implemented, since the output power is much higher than the comfortable listening level.

Figure 10: Headphone volume relative to human hearing

By Jorge Arbona TI Applications Engineer

Supriyo Palit TI Software Systems Engineer

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