Introduce in detail a Russian RISC-V chip: used in smart meters, the technology is backward, but the design is very thoughtful!

At present, solutions based on the open standard instruction set architecture RISC-V have an increasing market share. Today we introduce to you a RISC-V processor just launched by the Russian startup Milandr. The processor model is K1986BK025 and is used for meter control.

The K1986BK025 microcontroller based on the RISC-V core is Milandr’s second generation of electricity meter microcontrollers. The first generation K1986BK2x chips have been developed on the ARM Cortex-M0 processor core and have been in production for over 5 years. On this basis, Milur meters have been designed.

However, time does not stand still, technology needs to continue to evolve, and new market rules dictate new requirements for new chips. More functional requirements need to be introduced in compliance with the “minimum functional” standard of Russian metering equipment. It also needs the right price that can compete with giants like TI and NXP. New smart meters can turn off and limit power usage. This means that the new system should also provide information security so that intruders cannot power off or on at their own discretion. Based on these requirements, Milandr has developed a new RISC-V-based processor: K1986BK025, which will be introduced in detail next.

  1. Main functions

Processor core: RISC-V (BМ-310SCloudBEAR)

Main frequency: 60 MHz Supply voltage (main) 2.2…3.6 V Supply voltage (for ADC use) 3.0…3.6 V Supply voltage: 1.8…3.6 V

Flash program memory capacity: 256 + 8 KB

Memory capacity RAM: 112 KB

One-time programmable ROM capacity: 16 KB

Metering ADC: 24-bit sigma delta, 7 channels

ADC for calculating power consumption: 10-bit with temperature sensor

Interface: 5xUART, 3xSPI, 1xI2C

User IO: 55

512-byte battery field with real-time clock and tamper detection

4x 32-bit timer modules with 4 event capture channels and PWM

4 32-bit timer blocks, 4 event capture channels and PWM

watchdog timer

CRC count block with variable polynomial

Symmetric Cipher Algorithm Computing Support Block

random number generator

Frequency change detector

Power supply voltage detection unit (main, battery)

Photodetector block

Noise-generating devices in the power supply chain

Debug Interface: JTAG

Package Type: QFN88 (10 x 10 mm)

Operating temperature: 50°C…+85°C

  system structure:

  Introduce in detail a Russian RISC-V chip: used in smart meters, the technology is backward, but the design is very thoughtful!

 2. Processor core

As mentioned earlier, the core of the chip is a 32-bit RISC-V processor core (in RV32 IMC configuration) with the BM-310 designation, which was designed by CloudBEAR. It’s not their only processor core. They offer a range of cores, from small microcontroller cores to high-performance 64-bit multiprocessor clusters.


Milandr is developing new products based on cores of varying complexity in the CloudBEAR portfolio. Only the K1986VK025 based on the BM310 core is now available. However, other products, including those based on 64-bit kernels, will be available soon. The BM-310 core is a 32-bit RISC-V core that uses three-stage assembly and can perform a multiplication in two cycles. Support for floating-point arithmetic has not been implemented in this version of the chip (although the kernel allows floating-point arithmetic to be set).

The performance of the BM-310 core in the CoreMark test is 3.0 CoreMark/MHz. Therefore, it is comparable to the ARM Cortex-M3. At the same time, the core area of ​​the new chip is only 0.3m2. Considering that most of the tasks of calculating power consumption parameters are completed by the hardware controller of the metering ADC, the core of the main processing power can be used for the communication tasks of the metering device. .

 3. Price

Chip size is a major factor in chip cost. The larger the area, the more expensive it is, and the more complex the production technology, the higher the price. At the same time, the more complex the technology used, the smaller the area required to implement the desired function, and therefore the cheaper the price. Overall, the choice of technology is not obvious. The first generation K1986BK2x chips were developed at 180 nm. About a third of the chip is in the analog part (actually sigma-delta ADC, power, IO), which doesn’t actually decrease when switching to finer processes. However, according to the new requirements, the functional capacity should be increased by nearly 4 times.


The new chip implements 256KB Flash to 64K, RAM 112KB to 16K, 5 UARTs, 3 SPs, and more encryption technologies… So, after a comprehensive estimation and calculation, it is decided that if you are particularly concerned about the cost, then use 90nm The technology can enter the required cost range. Of course, it will be better to use 65nm or lower technology, but in general, the development cost will also be higher, which will make the project more risky in terms of financing.

4. Metering ADC

If the processor core is the heart of a microcontroller, then the metering ADC is its brain, as it is used to specify microcircuit assignments. The microcontroller implements a 24-bit Σ with 7 channels? ADC module.

For a three-phase network, all channels are divided into three pairs F0-F2 (voltage channel and current channel) and one independent current channel (called F0). Each of the 7 channels digitizes the input signal at an output sample rate of up to 16 kHz.

In addition, in each pair of channels F0-F2, there is an opportunity to calculate the rms value of the current/voltage, calculate the active and reactive power, calculate the active and reactive energy consumed, the signal frequency in the voltage channel, the peak excess and the signal drops below the set level.

These additional functional blocks reduce the load on the processor, thereby reducing the power consumption of the entire chip. Additionally, each ADC has an independent DMA channel that saves data to RAM without processor involvement.

  List of main parameters and functions of the ΣADC unit:

7 independent ADCs with output sampling rates of 4/8/16 kHz (4 current channels and 3 voltage channels). These channels are organized into 3 blocks for measuring the parameters of each phase F0-F2.

In the block of channel F0, the automatic selection of the current channel (with the maximum value) is implemented for the subsequent calculation of the power characteristics. If the current difference exceeds 6%, an interrupt will be generated. Apart from this function, the rest of the blocks F0-F2 are the same.

All ADC channels feature independent slope calibration coefficients.

Each current channel has an independent integrator.

Each ADC module (F0-F2) independently calculates the signal period through the voltage channel. The number of cycles to calculate this value can be set equal to 1/2/4/8/16/32/64/128 cycles.

Each module can verify the loss of periodic signals in the voltage channel.

Each module can verify that the voltage “drops” below a specified level and that the signals in the current and voltage channels exceed specified limits.

Allows correction of the phase of the signal in the voltage channel with 0.02% accuracy.

Allows calculation of rms values, rms squared values ​​of current and voltage and their independent calibration.

When calculating active and reactive energy, the accumulated energy value for the period is stored in separate registers (for positive and negative energy).

Full power and energy calculations.

Calculate the phase shift relative to phase 0.

Therefore, the power consumed by the computation is performed with minimal involvement of the processor.

 5. Protection

5.1 Password protection

The microcircuit implements all functions of information protection, including:

A coprocessor block supporting block cipher AES;

random number generator;

A block for computing the CRC of an arbitrary polynomial;

Dedicated volatile storage for critical information with battery

One-time programmable bootloader ROM that enables unique identification of each chip.

Symmetric encryption is implemented on the basis of coprocessors, which can speed up the most difficult operations. This speeds up encryption with maximum performance of up to 10 Mbps. If necessary, asymmetric cryptographic algorithms can be implemented in software.

 5.2 Engineering protection

In order to prevent the impact of various engineering methods on the electric energy meter and the independent chip, special engineering protection methods are adopted:

3 pins for tamper detector (Electronic seal)

Frequency Change Detector Module

Power supply voltage change detector unit

Optical detector unit

Prevent unauthorized memory reads

The pins of the pin tamper detector are three separate pins of the microcontroller through which signals from the external electronic seal can be recorded even when there is no mains power (battery only) and all clocks are off. Therefore, any attempt to mechanically shock the meter will be detected and recorded. In addition to the protection mechanisms of the device enclosure, methods to protect the microcircuit itself from more sophisticated attacks are also implemented.

To eliminate situations where the processor frequency “speeds up” or vice versa, a frequency change detector is implemented, which constantly compares the external frequency source with the internal RC generator, and when a deviation occurs outside the specified range, it An event is generated or the chip is switched to an internal (on-chip implemented) emergency frequency source.

The “abrupt” frequency signal is counteracted by the filtering system of the input signal. In order to properly start the microcircuit when the mains power is turned on, as well as to detect the fact that the power supply is outside the acceptable range, a voltage detection unit is implemented. The unit also monitors the battery level on which the chip operates in the absence of mains power. Thus, any manipulation or attempt to disrupt the operation of the microcircuit by the supply voltage has been eliminated.

To avoid leakage of critical information through “backside” channels such as power circuits, main power noise masking modules have been implemented in microcircuits using pseudo-random number generators. This module generates a randomly varying additional consumption that masks the main consumption. To prevent more serious semi-intrusive and invasive attacks (attacks on microcircuits when accessing their die or even individual circuits of a die), optical detectors are implemented. Since it’s usually the bare die of a microcircuit, it’s impossible for light to get in. In case the microcircuit breaks and light touches the chip, the optical sensor will sound an alarm.

If an intruder goes further, to limit access to the circuits inside the microcircuit, a protection stack is implemented on the upper layers of the die layout, where ground and power circuits are intertwined, and random polynomials are transmitted along the information circuits. By the way, that’s why the picture above shows a CAD layout drawing, not a real photo of the die.

As for the real picture of the die, it looks like this.

In contrast, the anti-theft net of ST card chip (ST23 series) is like this.


An alarm is also generated if the mesh integrity is physically violated. The software must monitor all alarm events and, if they occur, record the fact of the attack. What’s more, the microcircuit can be configured so that the cryptographic key information is automatically deleted when an attack is detected. All of this requires software assurance.

For user programs, the chip contains 16 KB of one-time programmable ROM and 256+8 KB of reprogrammable flash memory. The chip boots from built-in one-time programmable memory. Initially, when the chip is manufactured, this memory is clean, and for serialized products, a boot-trusted bootloader is loaded during testing and rejection. This provides a unique identification for each chip, guarantees the integrity of the metering and encryption software, and also guarantees the protection of user programs in flash memory.

in conclusion

While many are skeptical of Russian chips, we’re sure Milandr can already compete with foreign companies.


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