“With the rapid development of information technology, the ARM technology solution architecture, as a 32-bit embedded microprocessor with low power consumption, high performance, and small size, has been authorized by many intellectual property users, including the world’s top semiconductor and systems company. At present, it has been widely used in various Electronic products, automotive, consumer entertainment, imaging, industrial control, mass storage, network, security and wireless fields. People in the industry believe that the ARM-based technical solution is the solution with the most market prospects and market advantages.
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With the rapid development of information technology, the ARM technology solution architecture, as a 32-bit embedded microprocessor with low power consumption, high performance, and small size, has been authorized by many intellectual property users, including the world’s top semiconductor and systems company. At present, it has been widely used in various electronic products, automotive, consumer entertainment, imaging, industrial control, mass storage, network, security and wireless fields. People in the industry believe that the ARM-based technical solution is the solution with the most market prospects and market advantages.
Fieldbus CAN is a serial communication protocol developed to solve the data exchange between numerous electronic control modules in modern automobiles. Because it has multiple master stations to access the bus according to the priority, it adopts non-destructive bus arbitration, which can complete the error check and priority judgment of the communication data, the data length is at most 8 bytes, the transmission time is short, and the probability of being disturbed It is widely used in automotive, industrial, consumer electronics and other fields, and is recognized as one of the most promising fieldbuses.
Based on the advantages of ARM in embedded systems and the wide application of CAN bus, more and more ARM processors have built-in CAN controllers, which greatly facilitates the development of CAN bus by developers. But at present, the ARM processors in some products do not have built-in CAN controllers. In order to meet the real-time and reliability requirements for data transmission between nodes, without changing the original hardware structure, the CAN interface module is expanded externally. To achieve CAN communication has become a more appropriate choice.
Based on the ARM7TDMI-S processor LPC2131, this paper designs a more general hardware circuit of the CAN interface module for the processor without integrated CAN controller, and designs the reliability of the CAN bus. μCOS-II realizes CAN communication, designs embedded software, and finally verifies the reliability and feasibility of CAN bus communication in practice.
LPC2131
Philips LPC2131 is a high-performance 32-bit RISC microcontroller based on ARM7TDMI-S. On the one hand, it has all the advantages of ARM processors: low power consumption, high performance; development. Its characteristics are as follows:
・Integrated Thumb extended instruction set.
・32KB In-System Programmable (ISP) on-chip Flash and In-Application Programmable (IAP) 8KB RAM with vectored interrupt controller.
・2 UARTs, 2 I2C serial interfaces, 2 SPI serial interfaces, 2 timers (7 capture/compare channels), PWM unit can provide up to 6 PWM outputs, 8-channel 10-bit ADC, real-time Clock RTC, Watchdog Timer WDT, 48 general purpose I/O pins.
・CPU clock up to 60MHz with on-chip crystal oscillator and on-chip PLL.
The LPC2131 does not have an integrated CAN controller, and cannot use the CAN bus for communication. In order to enable LPC2131 to use CAN bus for communication, its functions can be expanded through external expansion.
hardware circuit design
Since LPC2131 is an ARM7TDMI-S microprocessor powered by 3.3V, its IO pins are 3.3V TTL level and can withstand 5V voltage. The independent CAN controller SJA1000 is powered by 5V, and the level of each IO port is the TTL level of 5V, so the two are compatible, and its IO can be directly connected.
LPC2131 and CAN controller interface
The interface between LPC2131 and CAN controller is shown in Figure 1. P0.8~P0.15 of LPC2131 are directly connected with AD0~AD7 of SJA1000 to realize data exchange. P0.22, P0.25, P0.31 and P0.23 are respectively connected with ALE/AS, RD/E, WR, CS of SJA1000 are connected to realize read/write and chip selection. P0.30 and P0.27 are connected to INT and RST of SJA1000 respectively to realize interrupt and reset.
When LPC2131 accesses SJA1000, it can simulate the read and write sequence specified in SJA1000 through software. The mode pin MODE of SJA1000 is set to high level through VCC, which makes SJA1000 work in Intel mode.
Figure 1 LPC2131 and CAN controller interface circuit
CAN transceiver and CAN bus interface
The interface between the CAN transceiver and the CAN bus is shown in Figure 2, in which the TX0 and RX0 of the SJA1000 are connected to the TXD and RXD of the CAN transceiver respectively. The CANH and CANL pins of 82C250 are connected in series with a common mode choke coil to eliminate certain common mode interference and enable the bus differential signal to pass smoothly.
And CANH and CANL are respectively connected with the bus through a magnetic bead to eliminate certain high-frequency interference. At the same time, two 30pf small capacitors are connected in parallel between CANH and CANL and the ground, which can filter out high-frequency interference on the bus and have a certain ability to prevent electromagnetic radiation. In addition, a TVS is connected between the two CAN bus access terminals and the ground. When the CAN bus has a high voltage, it is grounded through the breakdown of the TVS, which can play a certain overvoltage protection role. A slope resistor is connected to the Rs pin of the 82C250 to reduce the external radiation of the CAN bus.
Figure 2 CAN transceiver and bus interface circuit
For other processors without built-in CAN controller that can withstand 5V TTL level, just change the pins connected to the data ports ALE/AS, RD/E, WR, CS, INT, RST of SJA1000. It can complete the hardware design of the external expansion CAN interface, otherwise a logic level conversion device can be added between the two.
software design
Read and write access to SJA1000
Since the 48 pins of LPC2131 are all IO, it is first necessary to simulate the sequence of reading and writing SJA1000 through software to operate the SJA1000, and then complete the CAN communication function.
According to the read and write timing of SJA1000 in Intel mode[4], you can write the write function void WriteCan(uint8 Addr, uint8 Data) that LPC2131 sends data through the CAN controller SJA1000 and the read function uint8 ReadCan(uint8 Addr) that accepts the data received by the CAN controller, where Addr is the corresponding register of the SJA1000. Address, Data is the data sent by LPC2131, and the read function ReadCan can return the received data.
Realization of CAN Communication
To realize a CAN communication, it is necessary to realize 3 functional modules: the initialization module for SJA1000; the data sending module; the data receiving module.
・Initialization module for SJA1000
Before starting communication, first set each function register of SJA1000, including mode register, baud rate, clock divider, interrupt enable register, filter register, and output control register.
uint8 IniSJA1000 (uint8 BTR0, uint8 BTR1)
{
IO0CLR=CS; //chip select SJA1000
WriteCan(0,0×09); //Enter reset mode
WriteCan(31,0xe8); //Set the clock divider
WriteCan(4,0xfd); //Set the interrupt enable register
WriteCan(16, AcceptCode1);//Set acceptance code 1
WriteCan(17, AcceptCode2);//Set acceptance code 2
WriteCan(18, AcceptCode3);//Set acceptance code 3
WriteCan(19, AcceptCode4);//Set acceptance code 4
WriteCan(20,MaskCode1); //Set acceptance mask 1
WriteCan(21,MaskCode2); //Set acceptance mask 2
WriteCan(22,MaskCode3); //Set acceptance mask 3
WriteCan(23,MaskCode4); //Set acceptance mask 4
WriteCan(6,BTR0); //Set bus timing register 1
WriteCan(7,BTR1); //Set bus timing register 2
WriteCan(8,0xfa); //Set the output control accumulator
WriteCan(0,0×08); //Enter operation mode
OSCANMbox=OSMboxCreate(0);/Create CAN communication mailbox
if (OSCANMbox==NULL)
{
return FALSE;
}
return TRUE;
}
・Data transmission module
Suppose the ID of the data to be sent is stored in the array ID[4], the data is stored in the array SendData[8], the sending module program is as follows, where the parameter DLC is the number of bytes sent, FF is the frame type, that is, 0 is a data frame, and 1 is a remote frame.
void Tx(uint8 DLC, uint8 FF)
{
uint8 i;
OS_ENTER_CRITICAL();
If (FF==0x01)
{
WriteCan(16,DLC+0x80); //Data frame
}
else
{
WriteCan(16,DLC+0xd0); //remote frame
}
WriteCan(17,ID[0]);
WriteCan(18,ID[1]);
WriteCan(19,ID[2]);
WriteCan(20,ID[3]); //TX identification code
for (i=0;i
WriteCan(21+i,sentdata[i]); //TX data
WriteCan(1,0×01);//Set the send register to send
OS_EXIT_CRITICAL();
}
・Data receiving module
According to the circuit diagram 1, the method of interrupt acceptance is adopted to receive data. P0.30 of LPC2131 is set to external interrupt 3. The entire data acceptance module is composed of the data acceptance function void ReceiveData(uint8 *Rt) and the interrupt processing function Can_Exception(void). When SJA1000 receives CAN bus data, LPC2131 generates external interrupt 3 by receiving interrupt to make it enter the interrupt processing function, and then process the received data. The data accepting function and interrupt handling function are as follows:
|void ReceiveData (void)
{
uint8 i, err, *Rt;
OS_ENTER_CRITICAL();
Rt=(uint8 *)OSMboxPend(OSCANMbox,0,&err);
//Receive data by email
for (i=0;iReceiveData[i]=*Rt++; //Store the received data in a global variable for subsequent processing
OS_EXIT_CRITICAL();
}
void Can_Exception(void)
{
u
int8 temp[13],i;
OS_ENTER_CRITICAL();
for (i=0;item[i]=ReadCan(16+i); //Read CAN data
OSMboxPost(OSCANMbox,(void *)temp); //will
CAN data is sent to accept function by mailbox
EXTINT=0x08; //clear ENT3
VICVectAddr=0; //Interrupt return
OS_EXIT_CRITICAL();
}
Epilogue
The embedded system which uses ARM chip as the main controller and CAN bus as the data transmission mode to communicate has been more and more widely used. At the same time, the reliability of CAN communication has also become one of the key parts that affect the performance of the system.
Taking LPC2131 as an example, this paper presents a general hardware connection method between a class of microprocessors and CAN controller SJA1000, and designs the reliability of the CAN bus. Based on the embedded real-time operating system μCOS-II, the The CAN communication software is developed, and the design has been applied in the distributed monitoring system in the factory workshop, and the operation is reliable and stable.
The Links: CR6L-250-UL SKM75GB063D INFIGBT